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SynergeticCombinationofASIC&Memory
Version:0.8 Date:December07,2005
SYNCOAMCo.,Ltd
SEPS225
128x128Dots,262KColorsPMOLEDDisplayDriverandController
1.ProductPreview 262kcolorsOLEDsinglechipdisplaydriverIC DataInterface Parallelinterface:68/80seriesMPU(8/16/18bit) Serialinterface:SPI4wireinterface RGBinterface:18/16/6bitinterface DriverOutput 128xRGBcolumns(384),128rows DisplayRAMCapacity 128x18(RGB)x128=294,912bits VariousInstructionsSet Powersavemode Reducedcurrentdrivingavailable Windowmode Partialdisplay:programmablepaneldisplaysize Verticalscroll&Horizontalpanning OLEDColumnDrive Drivingcurrentcontrol:8bit,0uA~255uAby1uAstepcontrol Pre_chargecurrentcontrol:8bit,0uA~2040uAby8uAstepcontrol Pre_chargetimecontrol:programmablepre_chargetime(0clock~14clocks)basedon internaloscillatorclock OLEDRowDrive Currentsink:Max100mA InternalOscillatorCircuit Internal/Externalclockselectable Framerate:90frames/sec(75.0~150.0frames/secadjustable) SupplyVoltage VDD :2.4~3.3V VDDH:8.0~18.0V Package:AuBumped Orderinginformation SEPS225T0A TCPPackage SEPS225F0A COFPackage 1/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8
2.BlockDiagram
384 Column Driver
128 x 128 x 18 bits DDRAM
Instruction Registers
MPU Interface
Timing Controller
128 Row Driver
RGB Interface
Dot Display OSC
BlockDiagram 2/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8
3.PinDescription
PinName CPU PS CSB RS RDB/E Number OfPins 1 1 1 1 1 I/O I I I I I Connected To VSSorVDD VSSorVDD MPU MPU MPU Description SelectstheCPUtype Low:80SeriesCPU, High:68SeriesCPU Selectsparallel/Serialinterfacetype Low:serial, High:parallel SelectstheSEPS225. Low:SEPS225isselectedandcanbeaccessed High:SEPS225isnotselectedandcannotbeaccessed Selectsthedata/command Low:command, High:parameter/data Foran80systembusinterface,readstrobesignal(activelow) Foran68systembusinterface,busenablestrobe(activehigh) WhenusingSPI,fixittoVDDorVSSlevel Foran80systembusinterface,writestrobesignal(activelow) Foran68systembusinterface,read/writeselect Low:Write, High:Read WhenusingSPI,fixittoVDDorVSSlevel Servesasa18_bitbidirectionaldatabus PS Description 8_bitbus:DB[17:10] 9_bitbus:DB[17:9] 1 16_bitbus:DB[17:10],DB[8:1] 18_bitbus:DB[17:0] DB[17]SCL:Synchronousclockinput 0 DB[16]SDI:Serialdatainput DB[15]SDO:Serialdataoutput FixunusedpinstotheVSSlevel Fineadjustmentforoscillation Tie39 ohmstoOSCA1betweenOSCA2 Whentheexternalclockmodeisselected,OSCA1isused externalclockinput ResetSEPS225(activelow) SEPS225Displaycolumnoutputs SEPS225Displayrowoutputs ExternalColumnDrivingPowerSupply(8V~18V) ReturnGroundforVDDH Logicpowersupply(2.4V~3.3V) Logicground. Tie70 ohmstoVSS Selectsthetestmode Pre_chargeR Pre_chargeG Pre_chargeB OSCTest VerticalSync.Output VerticalSync.InputwhenRGBmodeisselected HorizontalSync.InputwhenRGBmodeisselected DotclockInputwhenRGBmodeisselected VideoenableInputwhenRGBmodeisselected
WRB/RWB
1
I
MPU
DB[17:0]
18
I/O
MPU
OSCA1 OSCA2 RESETB S[383:0] G[127:0] VDDH VSSH VDD VSS IREF TEST1 PRER PREG PREB EXPORT1 VSYNCO VSYNC HSYNC DOTCLK ENABLE
1 1 1 384 128 4 4 2 2 1 1 1 1 1 1 1 1 1 1 1
I O I O O I O O O O O I I I I
Oscillation Resistor MPU PANEL PANEL POWER POWER POWER POWER Resistor VSSorVDD
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SYNCOAMCo.,Ltd. SEPS225 Version:0.8
4.FunctionalDescription MPUInterface TheSEPS225hasthreehighspeedsysteminterface:a68system,an80system8/9/16/18bitbus,andaclock synchronousserial(SPI:SerialPeripheralInterface).Amongtheinterfacemodes,aspecificmodeisselected bythesettingofPSpinandMEMORY_WRITE_MODEregister(16h). TheSEPS225has3typeregisters:anindexregister(IR)8bits,awritedataregister(WDR),andareaddata register(RDR). The IR stores index information for the control registers and the DDRAM. The WDR temporarilystoresdatatobewrittenintocontrolregistersandtheDDRAM,andtheRDRtemporarilystores datareadfromtheDDRAM. Data written into the DDRAM from the MPU is first written into the WDR and then it is automatically written into the DDRAM by internal operation. Data is read through the RDR when reading from the DDRAM,andthefirstreaddataisinvalidandthesecondandthefollowingdataarevalid. Executiontimeforinstructionexcludingoscillationstartis0clockcycleandinstructionscanbewrittenin succession.
RS 0 0 1 1 80mode RDB 0 1 0 1 WRB 1 0 1 0 68mode RWB 1 0 1 0 E 1 1 1 1 Readsinternalstatus WritesindexesintoIR ReadsfromDDRAMthroughRDR WritesintocontrolregistersandDDRAMthroughWDR Operation
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SYNCOAMCo.,Ltd. SEPS225 Version:0.8
1)18bitBusInterface(Index16h)
DFM1 0 DFM0 0 TRI x Operation 18bitbusoperation
Index/CommandWrite
DDRAMRead/Write
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SYNCOAMCo.,Ltd. SEPS225 Version:0.8
2)16bitBusInterface
DFM1 0 DFM0 1 TRI x Operation 16bitbusoperation
Index/CommandWrite
DDRAMRead/Write
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SYNCOAMCo.,Ltd. SEPS225 Version:0.8
3)9bitBusInterface
DFM1 1 DFM0 0 TRI x Operation 9bitbusoperation
Index/CommandWrite
DDRAMRead/Write
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SYNCOAMCo.,Ltd. SEPS225 Version:0.8
4)8bitBusInterface
DFM1 1 1 DFM0 0 1 TRI 0 1 Operation Dual8bit Triple6bit
Index/CommandWrite
DDRAMWrite/Read
DDRAMWrite/Read(TRImode)
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SYNCOAMCo.,Ltd. SEPS225 Version:0.8
5)ClockSynchronizedSerialInterface(SPI) Setting PS pin to the "0" level allows clock synchronized serial data(SPI) transfer, using the chip select pin(CSB),RSpin,serialtransferclockpin(SCL)andserialdatainput(SDI). Whenchipisnotselected,internalshiftregisterandcounterisresetstoinitialvalue.InputdatathroughSDI pin are latched at the rising edge of serial transfer clock(SCL). SDI inputs are converted to 16bit or 18bit dataandtransferredtomemoryatthe16th/18thrisingedgeserialclock,respectively. Serialdatainput(SDI)isidentifiedtodisplaydataorcommandbyRSpin.
RS L H Function Command Parameter/Data
after8bitdatatransfer,serialtransferclock(SCL)goesto"H"atthenonaccessperiod.SDIandSCLsignals aresensitivetoexternalnoise.Topreventmissoperationchipselectorstateshouldbereleased(CSB="H") after8bitdatatransferasshowninthefollowing. *Note:WhentheSPImodeisselected,DB[15]pinmustbeunconnected.
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SYNCOAMCo.,Ltd. SEPS225 Version:0.8
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SYNCOAMCo.,Ltd. SEPS225 Version:0.8
6)RGBInterface WhentheRGB_IFregisterbit0issetto"0",SEPS225entersintotheRGBinterfacemodeandDDRAMwrite cycleissynchronizedbyDOTCLK.
18bitRGBinterface The 18bit RGB interface is selected by setting RIM[1:0] bits to "00". DDRAM write operation is Synchronized with DOTCLK and ENABLE. Display data are transmitted to DDRAM in synchronization with18bitRGBdatabus(DB[17:0])andthedataenable(ENABLE). DDRAMWrite

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SYNCOAMCo.,Ltd. SEPS225 Version:0.8
16bitRGBinterface The 16bit RGB interface is selected by setting RIM[1:0] bits to "01". DDRAM write operation is Synchronized with DOTCLK and ENABLE. Display data are transmitted to DDRAM in synchronization with16bitRGBdatabus(DB[17:10],DB[8:1])andthedataenable(ENABLE).
DDRAMWrite
18/16bitRGBinterfacetiming
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SYNCOAMCo.,Ltd. SEPS225 Version:0.8
6bitRGBinterface The6bitRGBinterfaceisselectedbysettingRIM[1:0]bitsto"10".DDRAMwriteoperationisSynchronized with DOTCLK and ENABLE. Display data are transmitted to DDRAM in synchronization with 6bit RGB databus(DB[17:12])andthedataenable(ENABLE).
DDRAMWrite
6bitRGBinterfacetiming
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SYNCOAMCo.,Ltd. SEPS225 Version:0.8
DDRAM(DisplayDataRAM)Addressing TheDDRAMstorespixeldataforthedisplay.Itiscomposedof128rowby128columnx18bitaddressable array. Address counter provides row and column address to DDRAM for access display pixel data from MPU. RelationshipBetweenDDRAMAddressandDisplayPosition
G0 G1 G2 G3 G4 G5 . . . . . G122 G123 G124 G125 G126 G127 RD=0 G127 G126 G125 G124 G123 G122 . . . . . G5 G4 G3 G2 G1 G0 RD=1 00h 01h 02h 03h 04h 05h . . . . . 79h 7Ah 7Bh 7Ch 7Eh 7Fh Column Data CD=0 CD=1 . . . . . 0 D0 S0 D127 S381 . . . . . 1 D1 S1 D126 S382 S383 S2 D125 . . . . . 2 D2 . . . . . 3 D3 D124 . . . . . . . . . . 124 D124 D3 . . . . . 125 D125 S381 D2 S0 S1 S382 D1 . . . . . 126 D126 . . . . . 127 D127 S383 D0 S2

RD:Rowscanshiftdirectionregisterbit. CD:Columndatashiftdirectionregisterbit. 14/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8
WindowAddressFunction WhendataiswrittentotheonchipDDRAM,awindowaddressrangewhichisspecifiedbythehorizontal address register(start : MX1[7:0], end : MX2[7:0]) or the vertical address register(start : MY1[7:0], end : MY2[7:0])canbewrittentoconsecutively.DataiswrittentoaddressesinthedirectionspecifiedbytheHC, VC(increment/decrement),andHVbit(HorVdirection).Whentheimagedataisbeingwritten,datacanbe writtenconsecutivelywithoutthinkingofadatawrapbydoingthis. The window must be specified within the DDRAM address area described below, Addresses must be set withinthewindowaddress. [Restrictiononwindowaddressrangesetting] (horizontaldirection)00hMX1[7:0]MX1[7:0] 00h / H 00h / V DDRAM address map MX2[7:0] 7Fh / H 00h / V
MY1[7:0]
10h / H 20h / V 10h / H 21h / V
2Fh / H 20h / V 2Fh / H 21h / V
MY2[7:0]
10h / H 3Fh / V
2Fh / H 3Fh / V
00h / H 7Fh / V
7Fh / H 7Fh / V
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SYNCOAMCo.,Ltd. SEPS225 Version:0.8
ResetStatus The SEPS225 is initialized as following description when RESETB terminal is set to "L". Usually RESETB terminalisconnectedresetterminalofMPU,sothatthechipcanbeinitializedsimultaneouslywithMPU. TheSEPS225shouldbeinitializedwhenthepowerison. INITIALSETTINGCONDITION(defaultsetting) 1.Framefrequency:90Hz 2.OSC:internalOSC 3.InternalOSC:ON 4.DDRAMwritehorizontaladdress:MX1=00h,MX2=7Fh 5.DDRAMwriteverticaladdress:MY1=00h,MY2=7Fh 6.DisplaydataRAMwrite:HC=1,VC=1,HV=0 7.RGBdataswap:OFF 8.Rowscanshiftdirection:G0,G1,...,G126,G127 9.Columndatashiftdirection:S0,S1,...,S382,S383 10.DisplayON/OFF:OFF 11.Paneldisplaysize:FX1=00h,FX2=7Fh,FY1=00h,FY2=7Fh 12.DisplaydataRAMreadcolumn/rowaddress:FAC=00h,FAR=00h 13.Prechargetime(R/G/B):0clock 14.Prechargecurrent(R/G/B):0uA 15.Drivingcurrent(R/G/B):0uA POWERONSEQUENCE
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SYNCOAMCo.,Ltd. SEPS225 Version:0.8
5.InstructionDescription NormalDisplay
ADDR 00h 01h 02h 03h 04h 05h 06h 08h 09h 0Ah 0Bh 0Ch 0Dh 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1Ah 20h 21h 22h 28h 29h 2Eh 2Fh 31h 32h 33h 34h 35h 36h 37h 38h 39h 3Ah 3Bh 3Ch 3Dh 3Eh 3Fh 40h 41h 42h 47h 48h 49h 4Ah RW R R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W DUTY7 DSL7 FAC7 FAR7 SAC7 SAR7 FX1_7 FX2_7 FY1_7 FY2_7 SX1_7 SX2_7 SY1_7 SY2_7 0 SST7 0 FSUT7 FSMS7 SSUT7 SSMS7 0 ISX1_7 ISX2_7 ISY1_7 ISY2_7 DUTY6 DSL6 FAC6 FAR6 SAC6 SAR6 FX1_6 FX2_6 FY1_6 FY2_6 SX1_6 SX2_6 SY1_6 SY2_6 SSA1 SST6 0 FSUT6 FSMS6 SSUT6 SSMS6 0 ISX1_6 ISX2_6 ISY1_6 ISY2_6 DUTY5 DSL5 FAC5 FAR5 SAC5 SAR5 FX1_5 FX2_5 FY1_5 FY2_5 SX1_5 SX2_5 SY1_5 SY2_5 SSA0 SST5 SMS1 FSUT5 FSMS5 SSUT5 SSMS5 SSMD1 ISX1_5 ISX2_5 ISY1_5 ISY2_5 IB7 IDX7 HC SELEXP FR3 0 0 PREM 0 0 0 PCR7 PCG7 PCB7 DCR7 DCG7 DCB7 SWAP 0 VSYOEN 0 MX1_7 MX2_7 MY1_7 MY2_7 MAC7 MAR7 IB6 IDX6 VC SELRES FR2 0 0 0 0 0 0 PCR6 PCG6 PCB6 DCR6 DCG6 DCB6 SM 0 VSYOP DFM1 MX1_6 MX2_6 MY1_6 MY2_6 MAC6 MAR6 IB5 IDX5 HV 0 FR1 0 0 0 0 0 0 PCR5 PCG5 PCB5 DCR5 DCG5 DCB5 RD RIM1 DOP DFM0 MX1_5 MX2_5 MY1_5 MY2_5 MAC5 MAR5 IB4 IDX4 SWAP 0 FR0 0 0 0 0 0 0 PCR4 PCG4 PCB4 DCR4 DCG4 DCB4 CD RIM0 ENP TRI MX1_4 MX2_4 MY1_4 MY2_4 MAC4 MAR4 IB3 IDX3 RD 0 DFR3 0 0 0 PTR3 PTG3 PTB3 PCR3 PCG3 PCB3 DCR3 DCG3 DCB3 0 0 HSYP 0 MX1_3 MX2_3 MY1_3 MY2_3 MAC3 MAR3 IB2 IDX2 CD 0 DFR2 RC 0 0 PTR2 PTG2 PTB2 PCR2 PCG2 PCB2 DCR2 DCG2 DCB2 SPT 0 VSYP HC MX1_2 MX2_2 MY1_2 MY2_2 MAC2 MAR2 IB1 IDX1 DC1 SELCLK DFR1 0 0 0 PTR1 PTG1 PTB1 PCR1 PCG1 PCB1 DCR1 DCG1 DCB1 DC1 0 0 VC MX1_1 MX2_1 MY1_1 MY2_1 MAC1 MAR1 IB0 IDX0 DC0 OSCDSB DFR0 PS SRN DON PTR0 PTG0 PTB0 PCR0 PCG0 PCB0 DCR0 DCG0 DCB0 DC0 EIM 0 HV MX1_0 MX2_0 MY1_0 MY2_0 MAC0 MAR0 INDEX STATUS_RD OSC_CTL CLOCK_DIV REDUCE_CURRENT SOFT_RST DISP_ON_OFF PRECHARGE_TIME_R PRECHARGE_TIME_G PRECHARGE_TIME_B PRECHARGE_CURRENT_R PRECHARGE_CURRENT_G PRECHARGE_CURRENT_B DRIVING_CURRENT_R DRIVING_CURRENT_G DRIVING_CURRENT_B DISPLAY_MODE_SET RGB_IF RGB_POL MEMORY_WRITE_MODE MX1_ADDR MX2_ADDR MY1_ADDR MY2_ADDR MEMORY_ACCESS_POINTERX MEMORY_ACCESS_POINTERY DDRAM_DATA_ACCESS_PORT DUTY2 DSL2 FAC2 FAR2 SAC2 SAR2 FX1_2 FX2_2 FY1_2 FY2_2 SX1_2 SX2_2 SY1_2 SY2_2 SSC0 SST2 0 FSUT2 FSMS2 SSUT2 SSMS2 0 ISX1_2 ISX2_2 ISY1_2 ISY2_2 DUTY1 DSL1 FAC1 FAR1 SAC1 SAR1 FX1_1 FX2_1 FY1_1 FY2_1 SX1_1 SX2_1 SY1_1 SY2_1 0 SST1 SMF1 FSUT1 FSMS1 SSUT1 SSMS1 FSMD1 ISX1_1 ISX2_1 ISY1_1 ISY2_1 DUTY0 DSL0 FAC0 FAR0 SAC0 SAR0 FX1_0 FX2_0 FY1_0 FY2_0 SX1_0 SX2_0 SY1_0 SY2_0 SSM SST0 SMF0 FSUT FSMS0 SSUT0 SSMS0 FSMD0 ISX1_0 ISX2_0 ISY1_0 ISY2_0 DUTY DSL D1_DDRAM_FAC D1_DDRAM_FAR D2_DDRAM_SAC D2_DDRAM_SAR SCR1_FX1 SCR1_FX2 SCR1_FY1 SCR1_FY2 SCR2_SX1 SCR2_SX2 SCR2_SY1 SCR2_SY2 SCREEN_SAVER_CONTEROL SS_SLEEP_TIMER SCREEN_SAVER_MODE SS_SCR1_FU SS_SCR1_MXY SS_SCR2_FU SS_SCR2_MXY MOVING_DIRECTION SS_SCR2_SX1 SS_SCR2_SX2 SS_SCR2_SY1 SS_SCR2_SY2 Description Default 00h C0h C0h 30h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 11h 00h 06h 00h 7Fh 00h 7Fh 00h 00h 7Fh 00h 00h 00h 00h 00h 00h 7Fh 00h 7Fh 00h 7Fh 00h 7Fh 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h
DDRAM[17:0] DUTY4 DSL4 FAC4 FAR4 SAC4 SAR4 FX1_4 FX2_4 FY1_4 FY2_4 SX1_4 SX2_4 SY1_4 SY2_4 0 SST4 SMS0 FSUT4 FSMS4 SSUT4 SSMS4 SSMD0 ISX14 ISX2_4 ISY1_4 ISY2_4 DUTY3 DSL3 FAC3 FAR3 SAC3 SAR3 FX1_3 FX2_3 FY1_3 FY2_3 SX1_3 SX2_3 SY1_3 SY2_3 SSC1 SST3 0 FSUT3 FSMS3 SSUT3 SSMS3 0 ISX1_3 ISX2_3 ISY1_3 ISY2_3
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SYNCOAMCo.,Ltd. SEPS225 Version:0.8
INDEX(00h)
R/W R Bit7 IDX7 Bit6 IDX6 Bit5 IDX5 Bit4 IDX4 Bit3 IDX3 Bit2 IDX2 Bit1 IDX1 Bit0 IDX0
IDX[7:0]:Indexaddressofregisters.
STATUS_RD(01h)
R Default Bit7 HC 1 Bit6 VC 1 Bit5 HV 0 Bit4 SWAP 0 Bit3 RD 0 Bit2 CD 0 Bit1 DC1 0 Bit0 DC0 0
ThestatusreadinstructionreadstheinternalstatusoftheSEPS225. HC:Horizontaladdressincrement/decrementatmemorywritemode. VC:Verticaladdressincrement/decrementatmemorywritemode. HV:AutomaticupdatemethodoftheAC(meansinternaladdresscounter). HV=0(horizontal), HV=1(vertical) SWAP:SwapbetweenRandB. RD:Rowscanshiftdirection. CD:Columndatashiftdirection. DC[1:0]:Displaydataoutputcontrol. OSC_CTL(02h)
R/W Default Bit7 SELEXP 1 Bit6 SELRES 1 Bit5 0 0 Bit4 0 0 Bit3 0 0 Bit2 0 0 Bit1 SELCLK 0 Bit0 OSCDSB 0
SELEXP:OSC WhenSELEXP=0,EXPORT1internalclock WhenSELEXP=1,EXPORT1"0"level SELRES:Internaloscillatormodeselection. WhenSELRES=0,Oscillatoroperateswithexternalresister WhenSELRES=1,Oscillatoroperateswithinternalresister SELCLK,OSCDSB:
SELCLK X 0 1 OSCDSB 0 1 1 CLOCKOFF InternalOSCON ExternalCLKmode
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SYNCOAMCo.,Ltd. SEPS225 Version:0.8
IREF(80h)
R/W Default Bit7 0 0 Bit6 0 0 Bit5 0 0 Bit4 0 0 Bit3 0 0 Bit2 0 0 Bit1 0 0 Bit0 IREF 0
IREF:Controlreferencevoltagegeneration. WhenIREF=0,Referencevoltagecontrolledbyexternalresister WhenIREF=1,Referencevoltagecontrolledbyinternalresister CLOCK_DIV(03h)
R/W Default Bit7 FR3 0 Bit6 FR2 0 Bit5 FR1 1 Bit4 FR0 1 Bit3 DFR3 0 Bit2 DFR2 0 Bit1 DFR1 0 Bit0 DFR0 0
FR[3:0]:OSCfrequencysetting.
FR3 0 0 0 0 0 0 0 0 FR2 0 0 0 0 1 1 1 1 FR1 0 0 1 1 0 0 1 1 FR0 0 1 0 1 0 1 0 1 FrameRate 75Hz 80Hz 85Hz 90Hz 95Hz 100Hz 105Hz 110Hz FR3 1 1 1 1 1 1 1 1 FR2 0 0 0 0 1 1 1 1 FR1 0 0 1 1 0 0 1 1 FR0 0 1 0 1 0 1 0 1 FrameRate 115Hz 120Hz 125Hz 130Hz 135Hz 140Hz 145Hz 150Hz
DFR[3:0]:Displayfrequencydivideration.
DFR3 0 0 0 0 0 0 0 0 DFR2 0 0 0 0 1 1 1 1 DFR1 0 0 1 1 0 0 1 1 DFR0 0 1 0 1 0 1 0 1 OSCCLK 1 1 1/2 1/3 1/4 1/5 1/6 1/7 DFR3 1 1 1 1 1 1 1 1 DFR2 0 0 0 0 1 1 1 1 DFR1 0 0 1 1 0 0 1 1 DFR0 0 1 0 1 0 1 0 1 OSCCLK 1/8 1/9 1/10 1/11 1/12 1/13 1/14 1/15
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SYNCOAMCo.,Ltd. SEPS225 Version:0.8
REDUCE_CURRENT(04h)
R/W Default Bit7 0 0 Bit6 0 0 Bit5 0 0 Bit4 0 0 Bit3 0 0 Bit2 RC 0 Bit1 0 0 Bit0 PS 0
RC:Reduceddrivingcurrent. WhenRC=0,normal WhenRC=1,1/2drivingcurrent(address0x10,0x11,0x12) PS:Powersavemode. WhenPS=0,normal WhenPS=1,dispoff,analogreset,internaloscillatoroff SOFT_RST(05h)
R/W Default Bit7 0 0 Bit6 0 0 Bit5 0 0 Bit4 0 0 Bit3 0 0 Bit2 0 0 Bit1 0 0 Bit0 SRN 0
SRN:Softresetactivehigh. WhenSRN=0,normalmode WhenSRN=1,allinternalregistervaluewillbedefault DISP_ON_OFF(06h)
R/W Default Bit7 PREM 0 Bit6 0 0 Bit5 0 0 Bit4 0 0 Bit3 0 0 Bit2 0 0 Bit1 0 0 Bit0 DON 0
PREM:Prechargemodeselect. WhenPREM=0,Scansignalishighlevelatpre_chargeperiod WhenPREM=1,Scansignalislowlevelatpre_chargeperiod DON:DisplayON/OFF. WhenDON=0,Turnsthedisplayoff WhenDON=1,Turnsthedisplayon 20/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8
PRECHARGE_TIME_R(08h)
R/W Default Bit7 0 0 Bit6 0 0 Bit5 0 0 Bit4 0 0 Bit3 PTR3 0 Bit2 PTR2 0 Bit1 PTR1 0 Bit0 PTR0 0
PRECHARGE_TIME_G(09h)
R/W Default Bit7 0 0 Bit6 0 0 Bit5 0 0 Bit4 0 0 Bit3 PTG3 0 Bit2 PTG2 0 Bit1 PTG1 0 Bit0 PTG0 0
PRECHARGE_TIME_B(0Ah)
R/W Default Bit7 0 0 Bit6 0 0 Bit5 0 0 Bit4 0 0 Bit3 PTB3 0 Bit2 PTB2 0 Bit1 PTB1 0 Bit0 PTB0 0
PTR[3:0]:PrechargetimeR. PTG[3:0]:PrechargetimeG. PTB[3:0]:PrechargetimeB. *PTR[3:0]/PTG[3:0]/PTB[3:0]isusedforprechargetimeselectionofRed/Green/Bluepixel. Therangeisfrom0to14basedoninternalOSC.
PTR3/ PRG3/ PRB3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 PTR2/ PRG2/ PRB2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 PTR1/ PRG1/ PRB1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 PTR0/ PRG0/ PRB0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 PrechargeTime(CLK) NoPrechargeTime(Clk) 1PrechargeTime(Clk) 2PrechargeTime(Clk) 3PrechargeTime(Clk) 4PrechargeTime(Clk) 5PrechargeTime(Clk) 6PrechargeTime(Clk) 7PrechargeTime(Clk) 8PrechargeTime(Clk) 9PrechargeTime(Clk) 10PrechargeTime(Clk) 11PrechargeTime(Clk) 12PrechargeTime(Clk) 13PrechargeTime(Clk) 14PrechargeTime(Clk) Reserved
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SYNCOAMCo.,Ltd. SEPS225 Version:0.8
PRECHARGE_CURRENT_R(0Bh)
R/W Default Bit7 PCR7 0 Bit6 PCR6 0 Bit5 PCR5 0 Bit4 PCR4 0 Bit3 PCR3 0 Bit2 PCR2 0 Bit1 PCR1 0 Bit0 PCR0 0
PRECHARGE_CURRENT_G(0Ch)
R/W Default Bit7 PCG7 0 Bit6 PCG6 0 Bit5 PCG5 0 Bit4 PCG4 0 Bit3 PCG3 0 Bit2 PCG2 0 Bit1 PCG1 0 Bit0 PCG0 0
PRECHARGE_CURRENT_B(0Dh)
R/W Default Bit7 PCB7 0 Bit6 PCB6 0 Bit5 PCB5 0 Bit4 PCB4 0 Bit3 PCB3 0 Bit2 PCB2 0 Bit1 PCB1 0 Bit0 PCB 0
PCR[7:0]:PrechargecurrentR. PCG[7:0]:PrechargecurrentG. PCB[7:0]:PrechargecurrentB. *Prechargecurrent=settingvalue*8uA. DRIVING_CURRENT_R(10h)
R/W Default Bit7 DCR7 0 Bit6 DCR6 0 Bit5 DCR5 0 Bit4 DCR4 0 Bit3 DCR3 0 Bit2 DCR2 0 Bit1 DCR1 0 Bit0 DCR0 0
DRIVING_CURRENT_G(11h)
R/W Default Bit7 DCG7 0 Bit6 DCG6 0 Bit5 DCG5 0 Bit4 DCG4 0 Bit3 DCG3 0 Bit2 DCG2 0 Bit1 DCG1 0 Bit0 DCG0 0
DRIVING_CURRENT_B(12h)
R/W Default Bit7 DCB7 0 Bit6 DCB6 0 Bit5 DCB5 0 Bit4 DCB4 0 Bit3 DCB3 0 Bit2 DCB2 0 Bit1 DCB1 0 Bit0 DCB0 0
DCR[7:0]:DCRdrivingcurrentR. DCG[7:0]:DCGdrivingcurrentG. DCB[7:0]:DCBdrivingcurrentB. *Drivingcurrent=settingvalue*1uA. 22/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8
DISPLAY_MODE_SET(13h)
R/W Default Bit7 SWAP 0 Bit6 SM 0 Bit5 RD 0 Bit4 CD 0 Bit3 0 0 Bit2 SPT 0 Bit1 DC1 0 Bit0 DC0 0
SWAP:RGBswap.
Input Output R R SWAP=0 G B G B R B SWAP=1 G B G R
SM:Scanmode. RD:Rowscanshiftdirection.
SM 0 0 1 1 RD 0 1 0 1 0 127 0 127 1 126 2 125 2 125 4 123 G[127:0] ... ... 125 2 1 126 3 124 126 1 125 2 127 0 127 0
... ...
126 1
... ...
CD:Columndatashiftdirection. WhenCD=0,D0toD127shift WhenCD=1,D127toD0shift SPT:Split WhenSPT=0,Onescreenmode WhenSPT=1,Twoscreenmode DC[1:0]:Columndatadisplaycontrol.
DC1 0 0 1 1 DC0 0 1 0 1 DataOutput NormalDisplay(default) AllLowDisplay AllHighDisplay Reserved
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SYNCOAMCo.,Ltd. SEPS225 Version:0.8
RGB_IF(14h)
R/W Default Bit7
0
Bit6 0 0
Bit5 RIM1 0
Bit4 RIM0 1
Bit3 0 0
Bit2 0 0
Bit1 0 0
Bit0 EIM 1
0
RIM[1:0]:RGBinterfacemode.
RIM1 0 0 1 1 RIM0 0 1 0 1 Result 18_BitRGBinterface 16_BitRGBinterface 6_BitRGBinterface Reserved
EIM:Externalinterfacemode. WhenEIM=0,RGB WhenEIM=1,MPU RGB_POL(15h)
R/W Default Bit7
VSYOEN
Bit6 VSYOP 0
Bit5 DOP 0
Bit4 ENP 0
Bit3 HSYP 0
Bit2 VSYP 0
Bit1 0 0
Bit0 0 0
0
VSYOEN:Vsync.Outputenable(0:VSYOdisable). VSYOP:Vsync.Outputpolarity(0:activelow). DOP:Dotclockpolarity(0:sampledatrisingedge). ENP:Enablepolarity(0:activelow). HSYP:Hsync.Polarity(0:activelow). VSYP:Vsync.Polarity(0:activelow). 24/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8
MEMORY_WRITE_MODE(16h)
R/W Default Bit7 0 0 Bit6 DFM1 0 Bit5 DFM0 0 Bit4 TRI 0 Bit3 0 0 Bit2 HC 1 Bit1 VC 1 Bit0 HV 0
DFM[1:0],TRI:
DFM1 0 0 1 1 1 DFM0 0 1 0 1 1 TRI X X X 0 1 BIT 18_bit 16_bit 9_bit 8_bit 8_bit Result Singletransfer,262ksupport Singletransfer,65ksupport Dualtransfer,262ksupport Dualtransfer,65ksupport Tripletransfer,262ksupport
HC:Horizontaladdressincrement/decrement. WhenHC=0,Horizontaladdresscounterisdecreased WhenHC=1,Horizontaladdresscounterisincreased VC:Verticaladdressincrement/decrement. WhenVC=0,Verticaladdresscounterisdecreased WhenVC=1,Verticaladdresscounterisincreased HV:SettheautomaticupdatemethodoftheACafterthedataiswrittentotheDDRAM. WhenHV=0,Thedataiscontinuouslywrittenhorizontally WhenHV=1,Thedataiscontinuouslywrittenvertically
25/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8
MX1_ADDR(17h)
R/W Default Bit7 MX1_7 0 Bit6 MX1_6 0 Bit5 MX1_5 0 Bit4 MX1_4 0 Bit3 MX1_3 0 Bit2 MX1_2 0 Bit1 MX1_1 0 Bit0 MX1_0 0
MX2_ADDR(18h)
R/W Default Bit7 MX2_7 0 Bit6 MX2_6 1 Bit5 MX2_5 1 Bit4 MX2_4 1 Bit3 MX2_3 1 Bit2 MX2_1 1 Bit1 MX2_1 1 Bit0 MX2_0 1
MY1_ADDR(19h)
R/W Default Bit7 MY1_7 0 Bit6 MY1_6 0 Bit5 MY1_5 0 Bit4 MY1_4 0 Bit3 MY1_3 0 Bit2 MY1_2 0 Bit1 MY1_1 0 Bit0 MY1_0 0
MY2_ADDR(1Ah)
R/W Default Bit7 MY2_7 0 Bit6 MY2_6 1 Bit5 MY2_5 1 Bit4 MY2_4 1 Bit3 MY2_3 1 Bit2 MY2_1 1 Bit1 MY2_1 1 Bit0 MY2_0 1
MX1[7:0]/MX2[7:0] Specifythehorizontalstart/endpositionofawindowforaccessinmemory.Datacanbewrittento DDRAMfromtheaddressspecifiedbyMX1[7:0]totheaddressspecifiedbyMX2[7:0]. MY1[7:0]/MY2[7:0] Specifytheverticalstart/endpositionofawindowforaccessinmemory.Datacanbewrittento DDRAMfromtheaddressspecifiedbyMY1[7:0]totheaddressspecifiedbyMY2[7:0].
26/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8
MEMORY_ACCESSPOINTERX(20h)
R/W Default Bit7 MAC7 0 Bit6 MAC6 0 Bit5 MAC5 0 Bit4 MAC4 0 Bit3 MAC3 0 Bit2 MAC2 0 Bit1 MAC1 0 Bit0 MAC0 0
MEMORY_ACCESSPOINTERY(21h)
R/W Default Bit7 MAR7 0 Bit6 MAR6 0 Bit5 MAR5 0 Bit4 MAR4 0 Bit3 MAR3 0 Bit2 MAR2 0 Bit1 MAR1 0 Bit0 MAR0 0
MAC[7:0]/MAR[7:0] Specifythehorizontalstart/verticalstartpositionofawindowforwriteinmemory DatacanbewrittentoDDRAMfromMAC[7:0]/MAR7:0]toMX2[7:0]/MY2[7:0]
27/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8
DDRAM_DATA_ACCESS_PORT(22h)
R/W Default
Bit17 DB17 Bit16 DB16 Bit15 DB15 Bit14 DB14 Bit13 DB13 Bit12 DB12 Bit11 DB11 Bit10 DB10 Bit9 DB9 Bit8 DB8 Bit7 DB7 Bit6 DB6 Bit5 DB5 Bit4 DB4 Bit3 DB3 Bit2 DB2 Bit1 DB1 Bit0 DB0
R
G
B
DDRAM[17:0]:Afterindexregister22hisselect,InternalDDRAMmemorycanbeaccessed. DUTY(28h)
R/W Default Bit7 DUTY7 0 Bit6 DUTY6 1 Bit5 DUTY5 1 Bit4 DUTY4 1 Bit3 DUTY3 1 Bit2 DUTY2 1 Bit1 DUTY1 1 Bit0 DUTY0 1
DUTY[7:0]:Displaydutyratio(16~127). DSL(29h)
R/W Default Bit7 DSL7 0 Bit6 DSL6 0 Bit5 DSL5 0 Bit4 DSL4 0 Bit3 DSL3 0 Bit2 DSL2 0 Bit1 DSL1 0 Bit0 DSL0 0
DSL[7:0]:Displaystartline(0~12716).
28/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8
D1_DDRAM_FAC(2Eh)
R/W Default Bit7 FAC7 0 Bit6 FAC6 0 Bit5 FAC5 0 Bit4 FAC4 0 Bit3 FAC3 0 Bit2 FAC2 0 Bit1 FAC1 0 Bit0 FAC0 0
D1_DDRAM_FAR(2Fh)
R/W Default Bit7 FAR7 0 Bit6 FAR6 0 Bit5 FAR5 0 Bit4 FAR4 0 Bit3 FAR3 0 Bit2 FAR2 0 Bit1 FAR1 0 Bit0 FAR0 0
FAC[7:0]:Firstscreendisplayhorizontaladdressfordisplay. FAR[7:0]:Firstscreendisplayverticaladdressfordisplay.
(FAC[7:0],FAR[7:0] = (00h,00h)
FAC[7:0]
(7Fh,00h)
FAR[7:0]
DDRAM Read Address Start point
(00h,7Fh)
Display Data RAM
(7Fh,7Fh)
Display Panel (OLED)
D2_DDRAM_SAC(31h)
R/W Default Bit7 SAC7 0 Bit6 SAC6 0 Bit5 SAC5 0 Bit4 SAC4 0 Bit3 SAC3 0 Bit2 SAC2 0 Bit1 SAC1 0 Bit0 SAC0 0
D2_DDRAM_SAR(32h)
R/W Default Bit7 SAR7 0 Bit6 SAR6 0 Bit5 SAR5 0 Bit4 SAR4 0 Bit3 SAR3 0 Bit2 SAR2 0 Bit1 SAR1 0 Bit0 SAR0 0
SAC[7:0]:Secondscreendisplayhorizontaladdressfordisplay. SAR[7:0]:Secondscreendisplayverticaladdressfordisplay. 29/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8
SCR1_FX1(33h)
R/W Default Bit7 FX1_7 0 Bit6 FX1_6 0 Bit5 FX1_5 0 Bit4 FX1_4 0 Bit3 FX1_3 0 Bit2 FX1_2 0 Bit1 FX1_1 0 Bit0 FX1_0 0
SCR1_FX2(34h)
R/W Default Bit7 FX2_7 0 Bit6 FX2_6 1 Bit5 FX2_5 1 Bit4 FX2_4 1 Bit3 FX2_3 1 Bit2 FX2_2 1 Bit1 FX2_1 1 Bit0 FX2_0 1
SCR1_FY1(35h)
R/W Default Bit7 FY1_7 0 Bit6 FY1_6 0 Bit5 FY1_5 0 Bit4 FY1_4 0 Bit3 FY1_3 0 Bit2 FY1_2 0 Bit1 FY1_1 0 Bit0 FY1_0 0
SCR1_FY2(36h)
R/W Default Bit7 FY2_7 0 Bit6 FY2_6 1 Bit5 FY2_5 1 Bit4 FY2_4 1 Bit3 FY2_3 1 Bit2 FY2_2 1 Bit1 FY2_1 1 Bit0 FY2_0 1
FX1[7:0]/FX2[7:0]:Thestart/endaddressofactivecolumnoutputsforthefirstscreen(00h~7Fh). (FX1[7:0]FX1 Hiz Active Columns FX2 Hiz VDDH
FY1 Display Size / Panel
Active Rows
Active Range FY2 VDDH OLED Panel (128 Column x 128 Row) Non Active Range
TherowoutputsoutofactiveareaarealwaysVDDHexcludingdisplayoff. 30/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8
SCR2_SX1(37h)
R/W Default Bit7 SX1_7 0 Bit6 SX1_6 0 Bit5 SX1_5 0 Bit4 SX1_4 0 Bit3 SX1_3 0 Bit2 SX1_2 0 Bit1 SX1_1 0 Bit0 SX1_0 0
SCR2_SX2(38h)
R/W Default Bit7 SX2_7 0 Bit6 SX2_6 1 Bit5 SX2_5 1 Bit4 SX2_4 1 Bit3 SX2_3 1 Bit2 SX2_2 1 Bit1 SX2_1 1 Bit0 SX2_0 1
SCR2_SY1(39h)
R/W Default Bit7 SY1_7 0 Bit6 SY1_6 0 Bit5 SY1_5 0 Bit4 SY1_4 0 Bit3 SY1_3 0 Bit2 SY1_2 0 Bit1 SY1_1 0 Bit0 SY1_0 0
SCR2_SY2(3Ah)
R/W Default Bit7 SY2_7 0 Bit6 SY2_6 1 Bit5 SY2_5 1 Bit4 SY2_4 1 Bit3 SY2_3 1 Bit2 SY2_2 1 Bit1 SY2_1 1 Bit0 SY2_0 1
SX1[7:0]:2ndScreendisplaysizehorizontalstart. SX2[7:0]:2ndScreendisplaysizehorizontalend. SY1[7:0]:2ndScreendisplaysizeverticalstart. SY2[7:0]:2ndScreendisplaysizeverticalend. 31/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8
SCREEN_SAVER_CONTEROL(3Bh)
R/W Default Bit7 0 0 Bit6 SSA1 0 Bit5 SSA0 0 Bit4 0 0 Bit3 SSC1 0 Bit2 SSC0 0 Bit1 0 0 Bit0 SSM 0
SA[1:0]:1st,2ndScreenautosleepsaver.
SSA1 0 0 1 1 SSA0 0 1 0 1 2ndScreen OFF OFF ON ON 1stScreen OFF ON OFF ON
SC[1:0]:1st,2ndScreenon/offsavercontrol.
SSC1 0 0 1 1 SSC0 0 1 0 1 2ndScreen OFF OFF ON ON 1stScreen OFF ON OFF ON
SSM:ScreenSaverModeon/off(0:off,1:on). WhenSSM=0,ScreenSavermodeOFF(default) WhenSSM=1,ScreensavermodeON SS_SLEEP_TIMER(3Ch)
R/W Default Bit7 SST7 0 Bit6 SST6 0 Bit5 SST5 0 Bit4 SST4 0 Bit3 SST3 0 Bit2 SST2 0 Bit1 SST1 0 Bit0 SST0 0
SST[7:0]:Screensaversleeptimer. Note)Basedon64framessync. Ex)whensettingvalue=10: Screensaverwillentersleepmodeafter10*64framedisplay. 32/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8
SCREEN_SAVER_MODE(3Dh)
R/W Default Bit7 0 0 Bit6 0 0 Bit5 SMS1 0 Bit4 SMS0 0 Bit3 0 0 Bit2 0 0 Bit1 SMF1 0 Bit0 SMF0 0
SMF[2:0]:1stScreenmodeset.
SMF1 0 0 1 1 SMF0 0 1 0 1 1stScreen Reserved LeftPanning RightPanning Reserved
SMS[2:0]:2ndScreenmodeset.
SMS1 0 0 1 1 SMS0 0 1 0 1 2ndScreen Boxmove Logon Reserved Wrap_around
33/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8
SS_SCR1_FU(3Eh)
R/W Default Bit7 FSUT7 0 Bit6 FSUT6 0 Bit5 FSUT5 0 Bit4 FSUT4 0 Bit3 FSUT3 0 Bit2 FSUT2 0 Bit1 FSUT1 0 Bit0 FSUT0 0
FSUT[7:0]:1stScreenupdatetimerbasedonframesync. SS_SCR1_MXY(3Fh)
R/W Default Bit7 FSMS7 0 Bit6 FSMS6 0 Bit5 FSMS5 0 Bit4 FSMS4 0 Bit3 FSMS3 0 Bit2 FSMS2 0 Bit1 FSMS1 0 Bit0 FSMS0 0
FSMS[7:0]:1stScreenmovingstep. FSMS[7:4]:Verticalmovingstep. FSMS[3:0]:Horizontalmovingstep. SS_SCR2_FU(40h)
R/W Default Bit7 SSUT7 0 Bit6 SSUT6 0 Bit5 SSUT5 0 Bit4 SSUT4 0 Bit3 SSUT3 0 Bit2 SSUT2 0 Bit1 SSUT1 0 Bit0 SSUT0 0
SSUT[7:0]:2ndScreenupdatetimerbasedonframesync. SS_SCR2_MXY(41h)
R/W Default Bit7 SSMS7 0 Bit6 SSMS6 0 Bit5 SSMS5 0 Bit4 SSMS4 0 Bit3 SSMS3 0 Bit2 SSMS2 0 Bit1 SSMS1 0 Bit0 SSMS0 0
SSMS[7:0]:2ndScreenmovingstep. SSMS[7:4]:Verticalmovingstep. SSMS[3:0]:Horizontalmovingstep. 34/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8
MOVING_DIRECTION(42h)
R/W Default Bit7 0 0 Bit6 0 0 Bit5 SSMD1 0 Bit4 SSMD0 0 Bit3 0 0 Bit2 0 0 Bit1 FSMD1 0 Bit0 FSMD0 0
FSMD[1:0]:1stScreenmovingdirection.
FSMD1 0 0 1 1 FSMD0 0 1 0 1 1stScreen UP,LEFT UP,RIGHT DOWN,LEFT DOWN,RIGHT
SSMD[1:0]:2ndScreenmovingdirection.
SSMD1 0 0 1 1 SSMD0 0 1 0 1 2ndScreen UP,LEFT UP,RIGHT DOWN,LEFT DOWN,RIGHT
SS_SCR2_SX1(47h)
R/W Default Bit7 ISX1_7 0 Bit6 ISX1_6 0 Bit5 ISX1_5 0 Bit4 ISX1_4 0 Bit3 ISX1_3 0 Bit2 ISX1_2 0 Bit1 ISX1_1 0 Bit0 ISX1_0 0
SS_SCR2_SX2(48h)
R/W Default Bit7 ISX2_7 0 Bit6 ISX2_6 0 Bit5 ISX2_5 0 Bit4 ISX2_4 0 Bit3 ISX2_3 0 Bit2 ISX2_2 0 Bit1 ISX2_1 0 Bit0 ISX2_0 0
SS_SCR2_SY1(49h)
R/W Default Bit7 ISY1_7 0 Bit6 ISY1_6 0 Bit5 ISY1_5 0 Bit4 ISY1_4 0 Bit3 ISY1_3 0 Bit2 ISY1_2 0 Bit1 ISY1_1 0 Bit0 ISY1_0 0
SS_SCR2_SY2(4Ah) Bit7 Bit6
R/W Default ISY2_7 0 ISY_6 0 Bit5 ISY2_5 0 Bit4 ISY2_4 0 Bit3 ISY2_3 0 Bit2 ISY2_2 0 Bit1 ISY2_1 0 Bit0 ISY2_0 0
ISX1[7:0]:2ndScreenimageboxhorizontalstartaddress. ISX2[7:0]:2ndScreenimageboxhorizontalendaddress. ISY1[7:0]:2ndScreenimageboxverticalstartaddress. ISY2[7:0]:2ndScreenimageboxverticalendaddress.
35/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8
6.ElectricCharacteristics 1)AbsoluteMaximumRating
ITEM Supplyvoltage(1) Supplyvoltage(2) Inputvoltage Storagetemperature SYMBOL VDD VDDH VI Tstg VSS/VSSH(0V) Reference Ta=+25 CONDITION PORT VDD VDDH *1 RATINGS 0.3~+4.0 0.3~+19.5 0.3~+VDD+0.3 65~+150 UNIT V V V
*1:DB[17:0],CPU,PS,CSB,RS,RDB,WRB,RESETB. 2)RecommendedOperationConditions
ITEM Supplyvoltage Operatingvoltage Operation temperature SYMBOL VDD VDDH VDC Topr PORT VDD VDDH S[383:0] MIN 2.4 8.0 0 TYP 2.8 16 16 MAX 3.3 18.0 18.0 85 UNIT V V V REMARK
40
3)DCCharacteristics
ITEM Highlevelinputvoltage Lowlevelinputvoltage Highleveloutputvoltage Lowlevelinputvoltage Highleveloutputvoltage Lowleveloutputvoltage Inputleakagecurrent Outputleakagecurrent Staticcurrent(1) Staticcurrent(2) CurrentConsumption(1) CurrentConsumption(2) CurrentConsumption(3) Oscillatorfrequency Oscillatorfrequency Byexternalresistor Framescanrate Columnoutputcurrentrange Columnoutputcurrentmatch Rowswitchoncurrentsink Rowswitchonresistance SYMBOL VIH VIL VOH1 VOL1 VOH2 VOL2 ILI ILO ISB SITBP IVDD1 IVDD2 IVDD3 FOSC1 FSO1 Frame IDC IDCM IDR RDR CONDITION IOH=0.4mA IOL=0.4mA IOH=0.1mA IOL=0.1mA VI=VSSorVDD VI=VSSorVDD CSB=VDD,VDD=2.8V Ta=25 CSB=VDD,VDD=2.8V Ta=25,Powersavemode VDD=2.8V IDC=200uA VDD=2.8V IDC=100uA VDD=2.8V IDC=50uA VDD=2.8V Ta=25 RF=39 VDD=2.8V,Ta=25 4uA uA uA uA uA uA uA MHz MHz uA
PORT
%
mA
36/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8
4)ACCharacteristics 41)SystemBUSRead/WriteTiming(80seriesCPUinterface)

(VDD=2.8V,Ta=25)
ITEM Addressholdtiming Addresssetuptiming Systemcycletiming Write"L"pulsewidth Write"H"pulsewidth Datasetuptiming Dataholdtiming SYMBOL tAH8 tAS8 tCYC8 tWRLW8 tWRHW8 tDS8 tDH8 CONDITION MIN 5 5 100 45 45 30 10 MAX UNIT ns ns ns ns ns ns ns DB[17:0] WRB PORT CSB RS
notice)Allthetimingreferenceis10%and90%ofVDD. 37/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8

(VDD=2.8V,Ta=25)
ITEM Addressholdtiming Addresssetuptiming Systemcycletiming Read"L"pulsewidth Read"H"pulsewidth Readdataoutputdelaytime Dataholdtiming SYMBOL tAH8 tAS8 tCYC8 tRDLR8 tRDHR8 tRDD8 tRDH8 CL=15pF CONDITION MIN 5 5 200 90 90 0 60 MAX UNIT ns ns ns ns ns ns ns DB[17:0] RDB PORT CSB RS
notice)Allthetimingreferenceis10%and90%ofVDD. 38/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8
42)SystemBUSRead/WriteTiming(68seriesCPUinterface)

(VDD=2.8V,Ta=25)
ITEM Addressholdtiming Addresssetuptiming Systemcycletiming Write"L"pulsewidth Write"H"pulsewidth Datasetuptiming Dataholdtiming SYMBOL tAH6 tAS6 tCYC6 tELW6 tEHW6 tDS6 tDH6 CONDITION MIN 5 5 100 45 45 40 10 MAX UNIT ns ns ns ns ns ns ns DB[17:0] E PORT CSB RS
notice)Allthetimingreferenceis10%and90%ofVDD. 39/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8

(VDD=2.8V,Ta=25)
ITEM Addressholdtiming Addresssetuptiming Systemcycletiming Read"L"pulsewidth Read"H"pulsewidth Readdataoutputdelaytime Dataholdtiming SYMBOL tAH6 tAS6 tCYC6 tELR6 tEHR6 tRDD6 tRDH6 CL=15PF CONDITION MIN 10 10 200 90 90 0 70 MAX UNIT ns ns ns ns ns ns ns DB[17:0] E PORT CSB RS
notice)Allthetimingreferenceis10%and90%ofVDD. 40/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8
43)SerialInterfaceTiming
(VDD=2.8V,Ta=25)
ITEM Serialclockcycle SCL"H"pulsewidth SCL"L"pulsewidth Datasetuptiming Dataholdtiming CSBSCLtiming CSBholdtiming SYMBOL tCYCS tSHW tSLW tDSS tDHS tCSS tCSH CONDITION MIN 60 25 25 25 25 25 25 MAX UNIT ns ns ns ns ns ns ns SDI CSB SCL PORT
notice)Allthetimingreferenceis10%and90%ofVDD. 41/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8
44)ExternalClockInputTiming
(VDD=2.8V,Ta=25)
ITEM Osc1"H"pulsewidth(1) Osc1"L"pulsewidth(1) Osc1"H"pulsewidth(2) Osc1"L"pulsewidth(2) SYMBOL tCKHW1 tCKLW1 tCKHW2 tCKLW2 CONDITION MIN TBD TBD TBD TBD MAX TBD TBD TBD TBD UNIT us us us us PORT OSC1 OSC1
45)ResetInputTiming
tRW
RESETB
tR Reset completion
Internal status
Reset

(VDD=2.8V,Ta=25)
ITEM Resettime RESETB"L"pulsewidth SYMBOL tR tRW CONDITION MIN 5 MAX 1.5 UNIT us us PORT RESETB
42/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8
7.ApplicationExample 1)ConnectionWithCPU 11)80SeriesCPUInterface(18bitbus) =>PS="1",CPU="0",DFM[1:0]="00"
12)68SeriesCPUInterface(18bitbus) =>PS="1",CPU="1",DFM[1:0]="00"
13)CPUConnectionWithSerialInterface
43/44
SYNCOAMCo.,Ltd. SEPS225 Version:0.8
RevisionHistory Rev.# Contents 0.0 Original 0.1 Preliminary 0.2 DeletePre_chargecurrent 0.3 Address3BhChanged 0.4 TableChanged 0.5 PoweronsequenceAddition 0.6 DCCharacteristicsChanged 0.7 AddPre_chargecurrent 0.8 AddRGBInterface
page P32 P17 P16 P36 P1,2
Name YKKim/AAhn YKKim/AAhn YKKim/AAhn YKKim/AAhn YKKim/AAhn YKKim/AAhn YKKim/SSKang YKKim/AAhn YKKim/AAhn
Date 2005.05.30 2005.06.09 2005.08.19 2005.09.01 2005.09.07 2005.09.14 2005.09.22 2005.09.22 2005.12.07
44/44

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